1. Field of the Invention
The present invention relates to a semiconductor fabricating method. More particularly, the present invention relates to a method of fabricating a shallow trench isolation (STI) structure.
2. Description of the Related Art
An isolation region is formed in an integrated circuit for the purpose of separating neighboring device regions of a substrate and preventing the carriers from penetrating through the substrate to neighboring devices. For example, isolation regions are used to isolate field effect transistors (FETs) from each other in order to prevent current leakage among the FETs.
Shallow trench isolation (STI) technique is a common method of forming isolation regions. STI structure is formed by first anisotropically etching to form a trench in the substrate, and then depositing oxide in the trench to form an isolation region. Since STI structure is scaleable, it has become widely used for forming sub-micron CMOS circuits.
In FIG. 1, a preserve layer 102 is formed on a substrate 100. A photolithographic and etching process is performed to form a trench 104 in the substrate 100 and the preserve layer 102. A low-pressure chemical vapor deposition is performed with tetra-ethyl-ortho-silicate (TEOS) serving as a gas source. An oxide layer 106 is formed to cover the preserve layer 102 and fill the trench 104. The oxide layer 106 is deposited in such way that the oxide layer 106 is conformal to the trench 104 and gradually gets thicker to fill the trench 104. Thus, a seam 108 is formed in the oxide layer 106 between opposite sidewalls of the trench 104. A dry densification is performed in nitrogen environment or oxygen environment. A chemical-mechanical polishing and a dip step are performed in sequence. However, the seam 108 is easily exposed after the chemical-mechanical polishing step. The dip step even expends the seam 108. Thus, defects usually form in the STI structure.
In the conventional STI structure, a seam easily forms in a trench after an oxide layer is deposited in the trench. If a trench with a high aspect ratio is provided, a void may even form in the oxide layer after depositing the oxide layer into the trench. The seam or void is likely to remain in the oxide layer even after the performance of a dry densification. In this manner, after the planarization step, the seam or void is easily exposed. Once the seam or void is exposed, it is easily to be enlarged during a dip step. This, in turn, causes current leakage and device failure to occur.